In recent years, resistance varying memory is receiving attention as a potential successor to flash memory. Resistance varying memory generally has a cross-point type structure configured having memory cells arranged in a matrix at intersections of a plurality of bit lines and a plurality of word lines intersecting the bit lines, each of the memory cells comprising a variable resistance element and a rectifying element.
In such a cross-point type resistance varying memory, a non-selected memory cell, as distinct from a selected memory cell subject to operations such as a write operation or erase operation, is applied with a voltage having a reverse bias with respect to the rectifying element. A leak current occurs in the non-selected memory cell applied with the reverse bias voltage. This leads to the problem that, as the number of non-selected memory cells increases, the leak current increases whereby power consumption increases, and so on.